Kernel/riscv64: Implement microseconds_delay

This simple delay loop uses the time CSR to wait for the given amount
of time. The tick frequency of the CSR is read from the
/cpus/timebase-frequency devicetree property.

Kernel/Arch/init.cpp

@@ -68,6 +68,8 @@
 #    include <Kernel/Arch/aarch64/RPi/Framebuffer.h>
 #    include <Kernel/Arch/aarch64/RPi/Mailbox.h>
 #    include <Kernel/Arch/aarch64/RPi/MiniUART.h>
+#elif ARCH(RISCV64)
+#    include <Kernel/Arch/riscv64/Delay.h>
 #endif
 
 // Defined in the linker script
@@ -295,6 +297,8 @@ extern "C" [[noreturn]] UNMAP_AFTER_INIT void init([[maybe_unused]] BootInfo con
 
     if (kernel_command_line().contains("dump_fdt"sv))
         dump_fdt();
+
+    init_delay_loop();
 #endif
 
     // Initialize TimeManagement before using randomness!

Kernel/Arch/riscv64/Delay.cpp

@@ -5,13 +5,29 @@
  */
 
 #include <AK/Assertions.h>
-#include <Kernel/Arch/Delay.h>
+#include <Kernel/Arch/Processor.h>
+#include <Kernel/Arch/riscv64/CPU.h>
+#include <Kernel/Arch/riscv64/CSR.h>
+#include <Kernel/Arch/riscv64/Delay.h>
 
 namespace Kernel {
 
-void microseconds_delay(u32)
+static u32 s_timebase_frequency = 0;
+
+void microseconds_delay(u32 microseconds)
 {
-    TODO_RISCV64();
+    VERIFY(s_timebase_frequency != 0);
+
+    u64 const start = RISCV64::CSR::read(RISCV64::CSR::Address::TIME);
+    u64 const delta = (static_cast<u64>(microseconds) * s_timebase_frequency) / 1'000'000ull;
+
+    while ((RISCV64::CSR::read(RISCV64::CSR::Address::TIME) - start) < delta)
+        Processor::pause();
+}
+
+void init_delay_loop()
+{
+    s_timebase_frequency = DeviceTree::get().resolve_property("/cpus/timebase-frequency"sv).value().as<u32>();
 }
 
 }

Kernel/Arch/riscv64/Delay.h

@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2024, Sönke Holz <sholz8530@gmail.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#pragma once
+
+#include <Kernel/Arch/Delay.h>
+
+namespace Kernel {
+
+void init_delay_loop();
+
+}